Key Features and Enhancements
Swift provides nearly all the robust features of the original Caravel harness, plus key modifications to enhance your design experience:
Processor Core: The management SoC utilizes an ARM Cortex-M0 CPU.
User Project Area: Open project area is provided for placing your custom IP blocks. The user space has an silicon area of 2.92 mm x 3.52 mm.
I/O Pads: Your user design has access to 36 configurable I/O pads.
Management SoC Peripherals: Includes essential components such as a Timer/Counter, UART, and GPIO.
Logic Analyzer: Features 64 logic analyzer probes to observe and control your User Project signals.
Memory: The management SoC includes 2 kbytes of SRAM.
Flash Controller: Supports Quad I/O SPI and includes a 16 x 32-byte lines read-only direct mapped cache.
User Project Interface: The user project area has an AHB-lite master port connection to the management SoC bus.
