chipIgnite IP Catalog
Accelerate Your Caravel Design
Welcome to the official IP catalog for the ChipCreate Platform using the Caravel SoC template. To accelerate your design and minimize risk, you can drop our pre-verified, production-ready IPs directly into the User Project Area, connecting seamlessly to the internal Wishbone bus.
The Digital IP catalog features essential, high-performance blocks required for a complete System-on-Chip (SoC) and custom logic peripherals.
| IP Name | Category | Description | Integration Detail |
|---|---|---|---|
| Commercial SRAM (4K, 16K, 32K) | Memory | Robust, commercially proven synchronous SRAM macros shipped in billions of units. Provides high-density, high-speed on-chip storage for the management or user SoC. | Wrapped with a Wishbone interface for easy memory-mapped access. Installed using the ChipFoundry IPM tool. |
| DFFRAM (128x32, 256x32, 512x32) | Memory | Register-based memory (D-Flip-Flop RAM) options providing fast, low-latency temporary storage, often used for smaller buffers or registers files in custom peripherals. | Integrated via standard structural or RTL connection. |
| GPIO Peripheral | Interface | A peripheral module for managing and interfacing with Caravel’s configurable I/O pads. Necessary for connecting your custom logic to the chip’s pins. | Designed to connect to the internal bus and map to the user I/O space. |
| 32-bit Timer and PWM Generator | Timing | A general-purpose digital block providing timing control, interrupt generation, and Pulse Width Modulation (PWM) outputs for driving external devices. | Ideal for creating complex signal sequences or measuring time intervals. |
| Quad SPI Flash Memory Controller | Interface | Logic to manage an external Quad SPI Flash memory device, enabling fast program and data storage access for the SoC firmware. | Provides high-throughput interface for off-chip data storage. |
| UART | Interface | A standard Universal Asynchronous Receiver/Transmitter for reliable serial communication with a host PC or other devices over a simple two-wire interface. | Essential for debugging and firmware loading. |
| I2S Receiver | Interface | An Inter-IC Sound (I2S) receiver block for connecting to and processing digital audio data streams from external codecs or sensors. | Supports high-quality, synchronous audio data transfer. |
| I2C Master Controller | Interface | An I²C master controller for serial communication with low-speed peripherals such as sensors, EEPROMs, and other slave devices on the I²C bus. | Manages clock and data lines for bidirectional communication. |
The Analog IP catalog is curated to support the integration of custom sensors and signal conditioning, enabling the development of edge AI and low-power IoT products.
| IP Name | Function | Description | Typical Use Case |
|---|---|---|---|
| Comparator | Signal Conditioning | Ultra low-power comparator for simple, fast analog signal level detection. | Wake-up circuits, zero-crossing detection. |
| Operational Amplifier | Amplification | High Gain Bandwidth (HGBW) and Low-Power (LP) variants for signal buffering and amplification. | Sensor front-ends, active filtering. |
| Instrumentation Amplifier | Amplification | High-precision amplifier designed for extracting small differential signals in the presence of large common-mode noise. | Biometric sensors, bridge measurements. |
| Detector | Monitoring | Over-voltage and Brown-out detector blocks to ensure power supply integrity and safe operation of the chip. | Power management and reliable system reset. |
| Temperature Sensor | Sensing | An on-chip temperature sensor block for monitoring the chip's die temperature, crucial for thermal management. | Thermal throttling, environmental sensing. |
| Precision Bandgap Reference | Reference | A 1.8V Precision Bandgap voltage reference for providing a stable, temperature-independent reference voltage to analog blocks like ADCs/DACs. | ADC/DAC biasing and calibration. |
| Oscillator | Timing | Low-speed and High-speed Crystal Oscillators (XO) for generating precise clock signals required by various digital and analog sub-systems. | Accurate clock source for timing and PLLs. |
| Low-Power LDO | Power Management | A Low-Power 1.8V Low-Dropout regulator for efficient on-chip voltage regulation. | Powering specific blocks with a clean voltage supply. |
| Programmable PLL | Clocking | A Phase-Locked Loop for clock generation and frequency synthesis, allowing for precise and variable clocking of the user project area. | Clock domain crossing and frequency multiplication. |
| DAC | Data Conversion | 16-bit capacitive and 12-bit resistive Digital-to-Analog Converters for high-resolution analog signal output. | Analog control, waveform generation. |
| ADC | Data Conversion | 16-bit SAR (Successive Approximation Register) ADC running at 1MSPS for high-speed, high-resolution analog-to-digital conversion. | High-throughput sensor data acquisition. |
ChipFoundry is actively supporting ReRAM (Resistive RAM) fabrication for ChipCreate MPW shuttles, with this option currently being offered free of charge for specific shuttle reservations.
IP installation is managed by the IP Manager (IPM) tool. Once installed in your project repository, the IP is ready to be instantiated within your user_project_wrapper.v file.
Ready to start your chip design?
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