GPIO Design Time Configuration
The verilog/rtl/user_defines.v file is the design-time configuration file used to set the Power-On Reset () default mode for the user-accessible pins () on the Caravel or Caravan chip.
What is user_defines.v Used For?
The Caravel harness uses the settings in this file to program the hardware block during the chip's sequence. This ensures that the pins assume a defined state immediately upon power-up before the internal Management begins executing firmware.
Tapeout/Fabrication: The fabrication flow uses this file to configure the control hardware with your specified defaults.
Run-Time Customization: After , the Management can override these defaults at any time by executing that writes new configurations to the control registers.
Action Required: You must manually edit this file to replace the placeholder with a specific mode macro for every your project uses.
Available Mode Macros
The file itself contains all available mode macros. You must use one of the defined macros for any pin connected to your design.
These macros define the pin's default configuration upon Power-On Reset ().
| Macro Name | Description |
| Management Modes | |
| Digital Input (from pad) connected to the Management SoC (no internal pull resistors). | |
| Digital Input connected to the Management SoC with an internal pull-down resistor. | |
| Digital Input connected to the Management SoC with an internal pull-up resistor. | |
| Digital Output (to pad) controlled by the Management SoC. | |
| Digital Bidirectional controlled by the Management SoC. | |
| Configures the pad for the Analog signal path, but associated with the Management SoC. | |
| User Project Modes | |
| Digital Input (from pad) connected to the User Project (no internal pull resistors). | |
| Digital Input connected to the User Project with an internal pull-down resistor. | |
| Digital Input connected to the User Project with an internal pull-up resistor. | |
| Digital Output (to pad) controlled by the User Project. | |
| Digital Bidirectional controlled by the User Project. | |
| Digital Output (to pad) controlled by the User Project with an internal monitor connection. | |
| Configures the pad for the Analog signal path, connected to the User Project (used for /analog projects). |
Configuring a Caravel Project
GPIO_MODE_MGMT_STD_INPUT_NOPULL GPIO_MODE_MGMT_STD_INPUT_PULLDOWN GPIO_MODE_MGMT_STD_INPUT_PULLUP GPIO_MODE_MGMT_STD_BIDIRECTIONAL GPIO_MODE_USER_STD_INPUT_NOPULL GPIO_MODE_USER_STD_INPUT_PULLDOWN GPIO_MODE_USER_STD_INPUT_PULLUP GPIO_MODE_USER_STD_BIDIRECTIONAL GPIO_MODE_USER_STD_OUT_MONITORED
MGMT input is also input to the user area.GPIO_MODE_USER_STD_INPUT_PULLDOWN GPIO_MODE_USER_STD_INPUT_PULLUP
USER must provide the appropriate output on io_out (fixed low for pull down and fixed high for pull up) AND set io_oeb to low.In order to have the user output actually output from the gpio cell, io_oeb should be low and one of the following modes should be used.GPIO_MODE_USER_STD_OUTPUT GPIO_MODE_USER_STD_BIDIRECTIONAL GPIO_MODE_USER_STD_OUT_MONITORED
io_oeb high will disable the gpio output buffer (Hi-Z output), which will allow external input in the case ofGPIO_MODE_USER_STD_BIDIRECTIONAL GPIO_MODE_USER_STD_OUT_MONITORED
io_oeb is low, the user input io_in will follow io_out.GPIO_MODE_USER_STD_INPUT_NOPULL and tie io_out and io_oeb high or low to Hi-Z avoid leakage.GPIO_MODE_USER_STD_OUTPUT and tie io_oeb low.Configuring an Analog Project (Caravan)
When using the template, targeting Caravan, the internal pin mapping is specialized.
Caravan Mapping for Analog Signals
In the , the internal pins (which include a series resistor) are mapped to a specific subset of the array:
Complete to Wrapper Port Mapping
| Index | Port Index |
⚠️ Pre-check Warning: Failure to replace the
GPIO_MODE_INVALIDplaceholder for all GPIO pins your design utilizes will cause the Precheck to fail. Do not submit your project with GPIO_MODE_INVALID definitions for active pins.