Unleash the Power of Open-Source Hardware!
Welcome to Microwatt Momentum, a hackathon designed to spark innovation and collaboration within the OpenPOWER ecosystem. This event challenges hardware developers to push the boundaries of what's possible with Microwatt, the open-source POWER CPU core.
The hackathon aims to bring together bright minds to explore Microwatt's potential and contribute to the growing open-source hardware movement.
Theme & Challenge: "Microwatt for the open computing era"
Participants are challenged to develop creative and impactful applications that leverage the Microwatt CPU core. Your project should demonstrate a useful and effective way of integrating the Microwatt POWER CPU core.
Target Audience & Eligibility
This hackathon is open to:
Projects can span various use cases but must deliver working, repeatable solutions. Example projects include designing a custom hardware accelerator for sensor data processing or integrating Microwatt with novel sensing technologies.
Key Technologies & Platforms
Participants are expected to utilize:
Microwatt CPU Core
OpenPOWER ISA
FPGA Simulation/Synthesis Tools (e.g., GHDL, Yosys, Verilator, NextPNR)
Software and Dev Toolchains (e.g., GCC for POWER, GDB)
Optional: Access to actual POWER hardware or FPGA boards and various sensor types
ChipFoundry OpenFrame SoC platform
How to Enter
Login to your Github account and create a public GitHub repository using this template repo.
Commit a Readme file with the project description and proposal.
Submit the URL for your Github repo using the form below on or before Sep 22, 2025 (by 11:59pm PST).
If selected for the final round, you will be notified by email. Update your Github repo with your final design on or before Oct 31, 2025.
Limit one entry per person, per email address. The entry must be original and use an approved open-source license. All designs must be implemented and fit in the Openframe User Project area.
View the Recording from Webinar 1
Please find the link to the video recording.
https://youtu.be/vnuwFMipBeM
You can also find a link to the slides here.
View the Recording from Webinar 2
Please find the link to the video recording.
https://youtu.be/rVcmsyFzPns
Slides are here.
Project Requirements
All requirements must be met to be eligible to win.
All submission content, documentation, prompt must be in English
A short description of the project must be included with your design.
All designs must be implemented and fit in the OpenFrame User Project area.
The VHDL/Verilog for the design can be coded by AI.
Testbenches for RTL verification must be provided as a reproducible element of this process. Constraints for STA and SDF simulations must also be provided.
If AI was used for any of the design process. all prompts or GPT session logs used in the design must be provided as part of the deliverables for the design.
The design needs to be open source with all materials required to reproduce made public. The project must include an official open-source license (e.g. Apache2, MIT, etc.)
To facilitate reproducibility by the community, we recommend the design be implemented using the OpenLane chipIgnite flow including all configuration and run results. However, we will accept any open-source implementation flow provided it is documented and reproducible.
Must be implementable in SKY130 with available standard cells.
The design must pass precheck and tapeout submissions on the ChipFoundry platform.
Winners must provide a video and screenshots demonstrating the creation of the project in a how-to or step-by-step format. The images and link to the video must be included in the documentation for their project in the GitHub repo. These materials may be used by ChipFoundry for promotional purposes.
Judging Criteria
Projects will be evaluated by a panel of experts based on the following criteria:
Project Documentation: The ability to easily replicate the project.
Prompt Documentation: Documentation of AI LLM prompts used, if applicable.
Code Quality: Coding best practices, documentation, and use of modular design.
Verification Coverage: The thoroughness of Verilog/VHDL test benches and post-PAR/cell placement analysis.
Design Technical Merit: The originality and improvement the new design brings to the existing processor.
All requirements must be met to be eligible to win, including providing a video and screenshots demonstrating the project's creation.
Judges
Mohamed Kassem - ChipFoundry
Peter Hofstee - IBM
Tim Pearson - Raptor Computing Systems
Paul Mackerras - IBM retired
Program Timeline
Registration Opens: September 2, 2025
Webinar 1: September 10, 2025 ( join )
Project Proposal Submission Deadline: September 22, 2025 (by 11:59pm PST)
Webinar 2: September 24, 2025
Final Design Submission: November 3, 2025 (by 11:59pm PST)
Final design selection: November 4-7, 2025
Winner Announcement: November 8, 2025
The Prize
The top three winning designs will be fabricated by ChipFoundry and delivered to their respective design teams in the form of a packaged part.
Resources
Participants will have access to:
Microwatt GitHub Repository: Official source code, documentation, and examples.
OpenPOWER Foundation Website: General information about the OpenPOWER ISA and community.
Community Forums/Chat: Dedicated channels for questions, collaboration, and mentor support.
chipIgnite Resources: Information and guidelines for preparing designs for the process on SkyWater 130nm. (Link to be provided upon registration for relevant teams).
