The NVM Innovation Contest

Welcome to the NVM Power-Up, a design contest focused on groundbreaking open-source silicon innovation. We are challenging hardware developers to leverage the unique capabilities of ReRAM based Non-Volatile Memory (NVM) IP to build complete, functional System-on-Chips (SoCs).

This competition seeks brilliant designs that integrate ReRAM based NVM to solve critical challenges in demanding fields like medical technology, automotive systems, or space applications. Your mission is to push the boundaries of energy-efficient, robust silicon design and contribute a vital component to the open-source hardware ecosystem.

The Grand Challenge: Architect a cutting-edge SoC that strategically integrates and exploits ReRAM based NVM IP for next-generation edge computing.

Who Should Compete?

We invite anyone ready to innovate in silicon design to join, including:

• Hardware Architects and FPGA Experts

• Embedded Software Engineers

• Students and Academic Researchers

• Passionate innovators dedicated to open-source hardware

Submissions must deliver a provably working and repeatable solution that fits within the designated project constraints.

Essential Technologies & Platforms

Your design must incorporate and utilize the following:

• BM Labs’ NVM IP (Non-Volatile Memory Intellectual Property)

• The ChipFoundry Caravel SoC Platform

• Target Process: SkyWater 130nm fabrication (SKY130)

• Standard open-source EDA tools (e.g., OpenLane, Klayout, Magic, etc...)

Submission Process

Entering the contest is straightforward:

1. Establish a public GitHub repository using the caravel_user_project template.

2. Your initial commit must include a detailed Readme file outlining your project concept and design proposal.

3. Submit your GitHub repository URL via the form below before October 10, 2025 (11:59pm PST).

4. Selected finalists will be notified and must submit their finalized design, fully verified and ready for tapeout, by November 3, 2025.

Critical Note: Only one original entry per person/email is permitted. The design must be published under an approved open-source license (e.g., Apache2.0) and must physically fit within the designated Caravel User Project area.

Mandatory Design Specifications

All entries must satisfy these technical and documentation requirements to qualify:

• Language: All documentation, code comments, and design descriptions must be in English.

• Functionality: The design must demonstrably use and integrate BM Labs’ NVM IP.

• Verification Package: Provide comprehensive RTL testbenches for full verification, along with necessary STA and SDF simulation constraints.

• AI Compliance: If any AI/LLM tools were used in the design process, a complete log of all prompts and session transcripts must be included in the deliverables.

• Open-Source Standard: The project must be fully reproducible. All design files must be public and licensed under an acceptable open-source license.

• Foundry Ready: The design must successfully pass all precheck and tapeout validation steps on the ChipFoundry platform for SKY130.

• Final Deliverable: Winning teams must provide a video walkthrough and accompanying screenshots demonstrating the creation and function of their project for promotional and educational purposes.

Judging & Evaluation

An expert panel will evaluate submissions based on how effectively they meet technical and documentation goals:

• Technical Ingenuity: The originality and value the design brings, specifically in its innovative use of the NVM IP.

• Code Mastery: Quality of the VHDL/Verilog, documentation, modularity, and adherence to best practices.

• Verification Rigor: Thoroughness of provided test benches and the reliability of post-placement analysis.

• Documentation Clarity: Ease with which other community members can understand and fully replicate the entire project.

• Transparency: Completeness of the AI/LLM prompt documentation, if applicable.

Timeline

• Registration Opens: September 26, 2025

• Intro to BM Labs’ NVM IP and Contest Details: September 30, 2025

• Webinar (Introduction): October 2, 2025

• Project Proposal Submission Deadline: October 10, 2025 (11:59pm PST)

• Final Design Submission Deadline: November 3, 2025 (11:59pm PST)

• Finalist Selection: November 4–7, 2025

• Winners Announced: November 8, 2025

The Ultimate Prize

The winning design will be submitted to the November shuttle for free fabrication! ChipFoundry will handle the tapeout and delivery of the packaged silicon parts directly to the winning design teams.

Resources

• Community Forums/Chat: Dedicated channels for questions, collaboration, and mentor support.

  •  https://discord.gg/mE9n6BNv9X

• chipIgnite Resources: Information and guidelines for preparing designs for the process on SkyWater 130nm. (Link to be provided upon registration for relevant teams).

  • https://chipfoundry.io/start-a-project

  • https://chipfoundry.io/faqs

  • https://chipfoundry.io/knowledge-base

  • https://github.com/chipfoundry

  • https://www.youtube.com/@ChipCreate

  • https://github.com/chipfoundry/caravel_user_Neuromorphic_X1_32x32